1. Field of the Invention
This invention relates to a semiconductor device in which a plurality of semiconductor constructs are stacked.
2. Description of the Related Art
In a conventional semiconductor device, a first semiconductor construct is stacked on a base board, and a second semiconductor construct having a planar-size smaller than that of the first semiconductor construct is stacked on a part of the first semiconductor construct. A plurality of external connection electrodes are provided in a peripheral area of the upper surface of the first semiconductor construct which is exposed without being covered by the second semiconductor construct, and a plurality of external connection electrodes are provided on the upper surface of the second semiconductor construct. These external connection electrodes are connected by bonding wires to respective upper layer connection pads provided on the base board around the first semiconductor construct. The first and second semiconductor constructs including the bonding wires are covered with a sealing material, and a plurality of lower layer connection pads are provided under the base board so that each of the lower layer connection pads is connected to the upper layer connection pad via a vertical conductor vertically extended in the base board. A plurality of solder balls are provided under the lower layer connection pads. A semiconductor device having such a configuration is disclosed in, for example, Jpn. Pat. Appln. KOKAI Publication No. 2005-158768.
The conventional semiconductor device described above has the following problems due to the connection by the bonding wires. That is, the diameter of the bonding wire is generally small because costs increase if the diameter of the bonding wire made of gold is relatively large, and the impedance of the bonding wire is high because the bonding wire is relatively long, which makes it impossible for the bonding wire to adapt to use at a high frequency. Further, the bonding wire hardly has heat releasing properties, and the heat releasing properties of the first and second semiconductor constructs therefore become worse. Moreover, since the base board (interposer) having the vertical conductors is used, costs increase.